tag:blogger.com,1999:blog-2050962176404305705.post1843459914458849681..comments2024-03-06T20:16:12.046+05:30Comments on VHDL coding tips and tricks: VHDL code for Carry Look Ahead adder vipinhttp://www.blogger.com/profile/17675762038225600067noreply@blogger.comBlogger3125tag:blogger.com,1999:blog-2050962176404305705.post-82972594987017290412016-10-14T15:31:55.313+05:302016-10-14T15:31:55.313+05:30wat is the vhdl programme for pipelined floating p...wat is the vhdl programme for pipelined floating point adderAnonymoushttps://www.blogger.com/profile/12285948512518363354noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-80501430590975380862015-12-02T22:30:43.719+05:302015-12-02T22:30:43.719+05:30check the pdf link in the article for the block di...check the pdf link in the article for the block diagram and implementation details.<br />vipinhttps://www.blogger.com/profile/02146017720228354842noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-5580363091376462912015-12-02T12:40:48.822+05:302015-12-02T12:40:48.822+05:30In the "behavorial" of cla_block.. to co...In the "behavorial" of cla_block.. to compute "C" you have used OR wherever required? <br />We are adding terms, right? So, we should use XOR, right?<br />Or, is it because, we are only interested in if there is a carry or not, hence we use OR?Anonymousnoreply@blogger.com