tag:blogger.com,1999:blog-2050962176404305705.post6708919380893372076..comments2024-03-06T20:16:12.046+05:30Comments on VHDL coding tips and tricks: VHDL: BCD to 7-segment display convertervipinhttp://www.blogger.com/profile/17675762038225600067noreply@blogger.comBlogger30125tag:blogger.com,1999:blog-2050962176404305705.post-7708912201476005802018-06-01T15:50:05.390+05:302018-06-01T15:50:05.390+05:30Urgent...
I need test bench for this please,
libr...Urgent...<br />I need test bench for this please,<br /><br />library IEEE;<br />use IEEE.STD_LOGIC_1164.ALL;<br /><br />entity SN74LS247 is<br />Port ( BCD_I : in STD_LOGIC_VECTOR (3 downto 0);<br />RBI : in STD_LOGIC;<br />LT : in STD_LOGIC;<br />BI : in STD_LOGIC;<br />RBO : out STD_LOGIC;<br />SEG_O : out STD_LOGIC_VECTOR (6 downto 0));<br />end SN74LS247;<br /><br />architecture Behavioral of SN74LS247 is<br />signal enable : std_logic;<br />begin<br /><br />enable <= LT and BI;<br /><br />--abcdefg<br />SEG_O <= "1111110" when (BCD_I = "0000") and enable = '1' and RBI = '1' else -- 0<br />"0110000" when (BCD_I = "0001") and enable = '1' else -- 1<br />"1101101" when (BCD_I = "0010") and enable = '1' else -- 2<br />"1111001" when (BCD_I = "0011") and enable = '1' else -- 3<br />"0110011" when (BCD_I = "0100") and enable = '1' else -- 4<br />"1011011" when (BCD_I = "0101") and enable = '1' else -- 5<br />"1011111" when (BCD_I = "0110") and enable = '1' else -- 6<br />"1110000" when (BCD_I = "0111") and enable = '1' else -- 7<br />"1111111" when (BCD_I = "1000") and enable = '1' else -- 8<br />"1111011" when (BCD_I = "1001") and enable = '1' else -- 9<br />"0001101" when (BCD_I = "1010") and enable = '1' else -- 10<br />"0011001" when (BCD_I = "1011") and enable = '1' else -- 11<br />"0100011" when (BCD_I = "1100") and enable = '1' else -- 12<br />"1001011" when (BCD_I = "1101") and enable = '1' else -- 13<br />"0001111" when (BCD_I = "1110") and enable = '1' else -- 14<br />"0000000" when (BCD_I = "1111") and enable = '1' else -- 15<br />"0000000" when RBI = '0' and LT = '1' and BCD_I = "0000" and BI = '0' else<br />"0000000" when BI = '0' else<br />"1111111" when LT = '0' else<br />"0000000";<br /><br />RBO <= '1' when LT='1' and RBI='0' and BCD_I="0000" else '0';<br /><br />end Behavioral;<br /><br />my email is :<br />yns69167@gmail.com<br />15S13544@mec.edu.omAnonymoushttps://www.blogger.com/profile/10562778903516617682noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-25156290659927503492017-11-26T02:59:24.250+05:302017-11-26T02:59:24.250+05:30kindly share the test bech code kindly share the test bech code dreamshttps://www.blogger.com/profile/11771942248133441549noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-7980668140713233562017-09-17T09:48:44.214+05:302017-09-17T09:48:44.214+05:30Can you share UCF File ? Can you share UCF File ? Anonymoushttps://www.blogger.com/profile/16851305694528328935noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-46471675729562206242017-08-04T22:11:53.604+05:302017-08-04T22:11:53.604+05:30If block diagram of binary to 7segment is given , ...If block diagram of binary to 7segment is given , much easier to understand.<br />Plz. If anyone can post the block diagram and vhdl code in behavioural modelling for this .<br />Anonymoushttps://www.blogger.com/profile/17789648666060940786noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-92064624373877715412017-07-12T00:40:52.303+05:302017-07-12T00:40:52.303+05:30do you have the corresponding XDC file ?
do you have the corresponding XDC file ? <br />Anonymoushttps://www.blogger.com/profile/03627077630631883956noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-13165733231883303162017-04-04T20:59:59.492+05:302017-04-04T20:59:59.492+05:30how do you display on the 7-segment display and di...how do you display on the 7-segment display and display using the led's to display the binary value at the same timefirerider22345https://www.blogger.com/profile/16494883282219917971noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-3273170489439895542017-01-30T10:41:12.180+05:302017-01-30T10:41:12.180+05:30hi i need to code 7segment BCD by use if , else. P...hi i need to code 7segment BCD by use if , else. Please help me and thank for answer. Anonymoushttps://www.blogger.com/profile/14138271505205110973noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-43776337010766153172016-12-09T06:58:23.683+05:302016-12-09T06:58:23.683+05:30Hi ,,do you know how to do vhdl code for 2 bit x 2...Hi ,,do you know how to do vhdl code for 2 bit x 2 bit multiplier using decoder to seven segment display?? Please please help me..i seriously dont know how to do it.Anonymoushttps://www.blogger.com/profile/15029762463029145607noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-6471433459061936602016-11-24T19:04:34.797+05:302016-11-24T19:04:34.797+05:30help me, i need vhdl code for counter for atm mach...help me, i need vhdl code for counter for atm machine when login more than 3 times its terminate . please urgent :(Anonymoushttps://www.blogger.com/profile/11188705228849522610noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-71583072567319973302016-09-19T16:12:09.826+05:302016-09-19T16:12:09.826+05:30hie can anyone help me to blink an external led us...hie can anyone help me to blink an external led using spartan 3e using vhdl<br />Anonymoushttps://www.blogger.com/profile/14311024715795239229noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-42712278069639838482016-04-19T18:12:06.651+05:302016-04-19T18:12:06.651+05:30hi , is the clock necessary for this code ?hi , is the clock necessary for this code ?Anonymoushttps://www.blogger.com/profile/10526833825753213530noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-4496835370551386212016-03-22T23:42:09.286+05:302016-03-22T23:42:09.286+05:30hi , is the clock necessary for this code ?hi , is the clock necessary for this code ?Anonymoushttps://www.blogger.com/profile/10526833825753213530noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-68067767734560818312013-10-12T01:07:33.526+05:302013-10-12T01:07:33.526+05:30hi could you please create a TEST BECH for SN74LS...hi could you please create a TEST BECH for SN74LS247...Anonymoushttps://www.blogger.com/profile/16849652826132912697noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-11722917530816442502013-07-26T17:02:43.332+05:302013-07-26T17:02:43.332+05:30i need vhdl coding for mimo using communication sy...i need vhdl coding for mimo using communication systemAnonymoushttps://www.blogger.com/profile/04276162782766925836noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-5190460931142215622013-07-26T16:59:42.823+05:302013-07-26T16:59:42.823+05:30please help me i need vhdl code for mimo using com...please help me i need vhdl code for mimo using communication systemAnonymoushttps://www.blogger.com/profile/04276162782766925836noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-38384189331955910922013-03-20T17:14:50.771+05:302013-03-20T17:14:50.771+05:30how to i show the otuput of this above program usi...how to i show the otuput of this above program using quartus IIAnonymoushttps://www.blogger.com/profile/12555829004277189900noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-20144278836074845782013-02-06T07:05:33.948+05:302013-02-06T07:05:33.948+05:30In reply to @Bhaumik:
library IEEE;
use IEEE.STD_...In reply to @Bhaumik:<br /><br />library IEEE;<br />use IEEE.STD_LOGIC_1164.ALL;<br /><br />entity SN74LS247 is<br /> Port ( BCD_I : in STD_LOGIC_VECTOR (3 downto 0);<br /> RBI : in STD_LOGIC;<br /> LT : in STD_LOGIC;<br /> BI : in STD_LOGIC;<br /> RBO : out STD_LOGIC;<br /> SEG_O : out STD_LOGIC_VECTOR (6 downto 0));<br />end SN74LS247;<br /><br />architecture Behavioral of SN74LS247 is<br /> signal enable : std_logic;<br />begin<br /><br /> enable <= LT and BI;<br /> <br /> --abcdefg<br /> SEG_O <= "1111110" when (BCD_I = "0000") and enable = '1' and RBI = '1' else -- 0<br /> "0110000" when (BCD_I = "0001") and enable = '1' else -- 1<br /> "1101101" when (BCD_I = "0010") and enable = '1' else -- 2<br /> "1111001" when (BCD_I = "0011") and enable = '1' else -- 3<br /> "0110011" when (BCD_I = "0100") and enable = '1' else -- 4<br /> "1011011" when (BCD_I = "0101") and enable = '1' else -- 5<br /> "1011111" when (BCD_I = "0110") and enable = '1' else -- 6<br /> "1110000" when (BCD_I = "0111") and enable = '1' else -- 7<br /> "1111111" when (BCD_I = "1000") and enable = '1' else -- 8<br /> "1111011" when (BCD_I = "1001") and enable = '1' else -- 9<br /> "0001101" when (BCD_I = "1010") and enable = '1' else -- 10<br /> "0011001" when (BCD_I = "1011") and enable = '1' else -- 11<br /> "0100011" when (BCD_I = "1100") and enable = '1' else -- 12<br /> "1001011" when (BCD_I = "1101") and enable = '1' else -- 13<br /> "0001111" when (BCD_I = "1110") and enable = '1' else -- 14<br /> "0000000" when (BCD_I = "1111") and enable = '1' else -- 15<br /> "0000000" when RBI = '0' and LT = '1' and BCD_I = "0000" and BI = '0' else<br /> "0000000" when BI = '0' else<br /> "1111111" when LT = '0' else<br /> "0000000";<br /> <br /> RBO <= '1' when LT='1' and RBI='0' and BCD_I="0000" else '0';<br /> <br />end Behavioral;<br />imodehttps://www.blogger.com/profile/06848386477781242314noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-73078183798359524122013-01-09T06:04:25.773+05:302013-01-09T06:04:25.773+05:30can anyone send me the project which consists ASIC...can anyone send me the project which consists ASIC design that are using synthesis tool and VHDL code. I'm new from this field can anyone send overall view to design the project. what the companies can do regarding ASIC design (overall) send to email address arun.distinctive@gmail.com<br /><br /><br /><br />please send it asap............and overall project Anonymoushttps://www.blogger.com/profile/16251373775834239172noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-60508802997487795812012-10-24T23:00:31.046+05:302012-10-24T23:00:31.046+05:30can you post code for multiplexed display
can you post code for multiplexed display<br />Anonymoushttps://www.blogger.com/profile/17426438140667648547noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-37643521594094774112012-10-22T18:44:53.612+05:302012-10-22T18:44:53.612+05:30Hi, need help can you please provide me the VHDL c...Hi, need help can you please provide me the VHDL codes for "SN74LS247" which is BCD 2 7-segment decoder/driver similar to one mention above but it has 3 additional logic and no clock.<br />plz help me or u can send me code on desai335@yahoo.com.<br />This will be really appreciated. <br /> <br /> <br /> <br /> Anonymoushttps://www.blogger.com/profile/12738501661841456945noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-5601092065999333262012-05-08T22:50:57.792+05:302012-05-08T22:50:57.792+05:30Can you post the synthesis report.Can you post the synthesis report.blogzworldhttps://www.blogger.com/profile/08518940686538297693noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-65162681058901168912011-12-21T19:55:38.629+05:302011-12-21T19:55:38.629+05:30can you help me to get a VHBL program for 64 bit C...can you help me to get a VHBL program for 64 bit CSAmar'dhttps://www.blogger.com/profile/15117546325522492579noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-43034774788735211182011-10-21T18:43:37.293+05:302011-10-21T18:43:37.293+05:30write a VHDL prog to display number on BCD-7 segme...write a VHDL prog to display number on BCD-7 segment display , input given from ps/2 keyboardsandeephttps://www.blogger.com/profile/05739630658230221622noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-6205829826438469222011-10-19T22:25:04.668+05:302011-10-19T22:25:04.668+05:30Please help me!
Write a VHDL code to perform the ...Please help me!<br /><br />Write a VHDL code to perform the function of multiplier <br />which the inputs are from Dip Switch and outputs <br />display to 7-segment LED with BCD.<br />X : dip 1~4represents value 0~15<br />Y : dip 5~8represents value 0~15<br /><br />Thanks you so muchsumdthttps://www.blogger.com/profile/10461287193834948498noreply@blogger.comtag:blogger.com,1999:blog-2050962176404305705.post-50908914552036763782011-07-21T02:02:41.940+05:302011-07-21T02:02:41.940+05:30Can some one help me with the code for Four bit BC...Can some one help me with the code for Four bit BCD decimal COUNTER using VHDL and the 74LS90. I'm using Xilinx 12.1 and I'm really struggling with the logic gate code.<br />my email is jct0378@gmail.comJteslahttps://www.blogger.com/profile/05569553918715580032noreply@blogger.com