Simulating a VHDL/Verilog code using Modelsim SE

    This is a simple How-To video for ModelSim SE 10.4a version. If you are already familiar with this software tool then you may not need to watch this video.

In this video, I am trying to show you:

1. How to create a new project in ModelSim SE.
2. Add VHDL codes to this project.
3. Compile and simulate the codes.
4. Few tips on the simulation part of the tool.